1. Technical Field
The present invention relates to a high-breakdown-voltage power semiconductor device that is used in, for example, a power conversion apparatus and a method of manufacturing a semiconductor device.
2. Background Discussion
In the related art, a power semiconductor device has been known which includes an element active portion to which a main current flows and a region that reduces the electric field around the element active portion to hold a breakdown voltage (for example, see the following Patent Literature 2 (FIG. 1 and FIG. 5-1)). Next, the power semiconductor device disclosed in the following Patent Literature 2 will be described. FIG. 6 is a diagram illustrating the structure of a semiconductor device according to the related art. FIG. 6(a) is a plan view illustrating the semiconductor device according to the related art disclosed in the following Patent Literature 2. The semiconductor device according to the related art illustrated in FIG. 6 includes an element active portion 2 which is provided at the center of a semiconductor substrate 1 and to which a main current flows and a breakdown voltage structure portion 3 that is provided around the element active portion 2 and surrounds the element active portion 2.
In FIG. 6(a), a straight portion of the breakdown voltage structure portion 3 is represented by reference numeral 3-1 and a corner portion that connects the straight portions 3-1 in a curved shape is represented by reference numeral 3-2. A detailed planar pattern indicating the actual structure formed in each of the element active portion 2 and the breakdown voltage structure portion 3 is not illustrated in FIG. 6(a). FIG. 6(b) is a cross-sectional view illustrating the breakdown voltage structure portion 3 taken along the line A-A of FIG. 6(a). FIG. 6(c) is an enlarged cross-sectional view illustrating a part of the breakdown voltage structure portion 3 which is surrounded by a rectangular frame (hereinafter, referred to as a dashed line frame) represented by a dashed line in FIG. 6(b).
In the breakdown voltage structure portion 3 of the semiconductor device according to the related art illustrated in FIG. 6, in an off state, the front surface of the n-type semiconductor substrate 1 is covered with at least an insulating film 5 in order to hold an off voltage applied between an upper electrode and a lower electrode (the upper electrode is a metal electrode 9a and the lower electrode is not illustrated) of the n-type semiconductor substrate 1 with high reliability. The insulating film 5 is generally an oxide film. For example, a silicon nitride (SiN)-based insulating film may be formed as the insulating film 5. In addition, in many cases, the breakdown voltage structure portion 3 is not only covered with the insulating film 5, but is also provided with an electric field reduction structure, such as a guard ring 4b or field plates 7 and 9b, in order to improve the breakdown voltage. Reference numeral 11 indicates an oxide film.
The field plate 9b has a function of improving the breakdown voltage using the electric field reduction function described above and a function of shielding (blocking) external charge which gets into the vicinity of the front surface of the insulating film 5 in the breakdown voltage structure portion 3 from an external environment to maintain long-term breakdown voltage reliability (also referred to as charge resistance or an induced charge shielding function). In some cases, when external charge (not illustrated) reaches the surface of the insulating film 5 and is then attached thereto, the polarity of the charge induced in the insulating film 5 affects an electric field intensity distribution in the vicinity of the front surface of the n-type semiconductor substrate 1 immediately below the insulating film 5 at the time when an off voltage is applied and breakdown voltage reliability deteriorates, which is not preferable.
In addition, the field plate 9b is formed at the same time as the metal electrode 9a which contacts the surface of a p-type well region 4a on the front surface of the element active portion 2 is formed, in order to improve the efficiency of a manufacturing process. Therefore, in general, the field plate 9b and the metal electrode 9a are formed using the same kind of metal film. For the above-described charge resistance, the thick field plate 9b, which is a metal film, has the feature that the performance of interrupting the effect of the external charge is higher than that of the thin field plate 7, which is a polysilicon film. As the metal film including the metal electrode 9a and the field plate 9b, for example, an aluminum alloy (Al—Si alloy) film having a very small amount of silicon (Si) added thereto is formed on the front surface of the n-type semiconductor substrate 1 by a sputtering method.
In particular, in the power semiconductor device, the metal film including the metal electrode 9a and the field plate (hereinafter, referred to as a metal field plate) 9b is formed with a relatively large thickness of about 3 μm to 5 μm. Therefore, the metal electrode 9a and the metal field plate 9b are processed into a desired electrode pattern or a desired field plate pattern by wet etching using a photo process, not dry etching. However, since the metal film, such as a relatively thick Al—Si alloy film, is patterned by wet etching, a variation in the amount of etching, such as a variation in the side etching width of the metal film, is likely to increase. As a result, there is a concern that a variation in the initial breakdown voltage will increase.
In order to reduce the variation in the breakdown voltage, it is necessary to predict the magnitude of the variation in the amount of etching, such as the variation in the side etching width, and design the breakdown voltage structure portion 3 such that the width of the breakdown voltage structure portion 3 (the width of the breakdown voltage structure portion 3 in a direction from the boundary with the element active portion 2 to the end of the n-type semiconductor substrate 1) is large. However, when the width of the breakdown voltage structure portion 3 increases, the chip size increases, which is not preferable in terms of a reduction in costs.
For example, a conductive polysilicon film or a semi-insulating thin film is used as the field plate 7. The field plate 7 is thinner than the relatively thick metal field plate 9b and can be patterned by dry etching. Therefore, the patterning accuracy of the field plate 7 is higher than that of the metal field plate 9b. 
As the electric field reduction effect of the breakdown voltage structure portion 3 is enhanced in order to increase the breakdown voltage, the width of the breakdown voltage structure portion 3 needs to increase. However, in this case, as described above, the width of the breakdown voltage structure portion 3 increases, which results in an increase in the chip size. In addition, when the width of the breakdown voltage structure portion 3 increases, the area of the breakdown voltage structure portion 3 occupied in the semiconductor device increases and the area of the element active portion 2 is relatively reduced. Therefore, it is preferable that the width of the breakdown voltage structure portion 3 be small.
In the breakdown voltage structure portion 3 according to the related art illustrated in FIG. 6, the field plate has a double structure of the metal film and the polysilicon film in order to improve the patterning accuracy of the metal field plate 9b. The field plate with the double structure includes the field plate (hereinafter, referred to as a polysilicon field plate) 7, which is a polysilicon film, as a lower layer, and the metal field plate 9b as an upper layer.
The width of the polysilicon field plate 7, which is the lower layer, is substantially equal to the width of the metal field plate 9b, which is the upper layer. In this way, it is possible to improve both the electric field reduction effect and charge resistance while minimizing an increase in the width of the breakdown voltage structure portion 3. In addition, since the polysilicon film is used as the lower layer of the field plate with the double structure, it is possible to reduce a variation in the initial breakdown voltage, as compared to a case in which the field plate includes only the metal field plate 9b. 
When the field plate with the double structure described above is formed, each field plate and each guard ring need to have the same potential in order to validate the electric field reduction function. In order to achieve the structure, an opening portion is provided in the insulating film on the surface of the guard ring and the field plate contacts the guard ring through the opening portion. In this case, in order to consider both the patterning accuracy of the insulating film by etching and alignment accuracy and form a low-resistance contact portion, it is necessary to increase the width of the guard ring, as compared to a case in which the contact portion is not provided.
In order to meet the requirements, the following Patent Literature 2 discloses a structure in which a contact portion provided in an insulating film 5 is arranged only on a p-type guard ring 4b in four corner portions 3-2 of a breakdown voltage structure portion 3 and is not arranged in a straight portion 3-1 of the breakdown voltage structure portion 3 such that the width of the guard ring does not increase. As a result, in the following Patent Literature 2, the width of the breakdown voltage structure portion 3 is not actually changed and a semiconductor device with a small variation in initial breakdown voltage is obtained.
As another factor which affects the variation in the initial breakdown voltage, there is misalignment between the guard ring and the field plate. In general, a p-type layer of the guard ring is formed by forming an opening portion in an oxide film using a photolithography method and implanting p-type impurity ions (for example, boron (B) ions) into an n-type semiconductor substrate using the oxide film as a mask. In the field plate, a mask different from the mask which is used to form the guard ring is used to pattern the metal field plate or the polysilicon field plate.
As such, since different masks are used to form the guard ring and the field plate, it is inevitable that misalignment occurs between the pattern of the guard ring and the pattern of the field plate in the photolithography process (particularly, exposure) using each mask. The misalignment (alignment accuracy) is the relative positional deviation between the guard ring and the field plate and causes a variation in an electric field intensity distribution. As a result, a variation in breakdown voltage occurs.
As a method of reducing the variation in breakdown voltage caused by the misalignment, a method has been proposed which forms a self-aligned guard ring using a polysilicon field plate as a mask, without using an oxide film patterned by photolithography as the mask, to omit an alignment process, thereby reducing the variation in breakdown voltage (for example, see the following Patent Literature 3 (FIG. 3 and paragraphs [0007] and [0009])). In the following Patent Literature 3, since alignment for forming the guard ring is not performed, the number of alignment processes is reduced by one and misalignment is reduced.
For the field plate technique of the breakdown voltage structure portion, in order to obtain stable high breakdown voltage characteristics without increasing the area of the breakdown voltage structure portion occupied in the semiconductor device, a technique has been proposed in which a field plate, which is a conductive film, and a field plate, which is a semi-insulating film, are alternately arranged on a plurality of annular guard rings (for example, see the following Patent Literature 1 (FIG. 1 and paragraph [0026])).